Looking at the TXS0108E datasheet, I wonder if this might be useful for a project I'm working on. It's an RTL trainer board with an RP2350 micro-controller and an ICE40UP5K FPGA. On the previous version of this board, which used RP2040, users have accidentally damaged them by having both master (FPGA) and slave (serial memory) of a bidirectional QSPI bus drive it at the same time. I wonder if putting TXS0108E between them, by virtue of the bus then mostly being open drain but with one-shot accelerator, it would prevent damage in the event of a "buggy" QSPI design.Their mode of operation is to make the circuit effectively open drain with pull-up resistors (like the classic FET I2C level shifter), but then fix the slow rising edges by adding an edge-boosting circuit.
Statistics: Posted by alastairpatrick — Thu Oct 24, 2024 11:48 pm